# Information regarding : 7100\_2XAD9361

**URL:** <https://forum.opensourcesdrlab.com/t/information-regarding-7100-2xad9361/129>\
**Category:** Product Support\
**Created:** [September 25, 2026, 9:27pm UTC](https://forum.opensourcesdrlab.com/t/information-regarding-7100-2xad9361/129 "2026-09-25T21:27:42Z")\
**Posts on this page:** 1\
**Page:** 1

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**Author:** ![H4ins](https://forum.opensourcesdrlab.com/user_avatar/forum.opensourcesdrlab.com/h4ins/32/29_2.png) [@H4ins](https://forum.opensourcesdrlab.com/u/H4ins)\
**Post date:** [September 25, 2026, 9:27pm UTC](https://forum.opensourcesdrlab.com/t/information-regarding-7100-2xad9361/129/1 "2026-09-25T21:27:42Z")

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Hello guys,

Two questions for you regarding the 7100\_2XAD9361 unit.

- Does the shipped bitstream program the ADF4001, so that EXT\_10M disciplines the VCTCXO? If not, is there a register path or a newer image?
- Which J2 (FX8C) pins, if any, are routed to PS EMIO in the shipped bitstream, and at what VCCO\_11 level?

Best regards,

J